The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data decoding.
Various storage systems include data processing circuitry implemented with a data decoding circuit. In some cases, the data decoding circuit operates on a very large codeword that includes a number of parity bits. It is an advantage to use increasingly large codewords to achieve increased data processing performance. However, such large codewords require large and complex data decoding circuits. Such large and complex data decoding circuits require significant die area and power. One approach to dealing with this situation is to make a very large codeword out of a number of smaller codewords that are concatenated together. Such smaller codewords allow for reducing the size and power required by the data decoding circuit, but come with a corresponding reduction in processing performance.
Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for data processing.